Problem set 43

1. A positive clamping circuit is one that clamps:
1. The positive extremity of the signal to the zero level
2. The positive extremity of the signal to a positive dc voltage
3. The negative extremity of the signal to the zero level
4. The negative extremity of the signal to a positive dc voltage

A circuit that places either the positive or negative peak of a signal at a desired D.C level is known as a clamping circuit. A clamping circuit introduces (or restores) a D.C level to an A.C signal. Thus a clamping circuit is also known as D.C restorer, or D.C reinserted or a baseline stabilizer. The following are two general types of clamping.

1. Positive clamping occurs when negative peaks raised or clamped to ground or on the zero level i.e., it pushes the signal upwards so that negative peaks fall on the zero level.
2. Negative clamping occurs when positive peaks raised or clamped to ground or on the zero level i.e., it pushes the signal downwards so that the positive peaks fall on the zero level.

In both cases the shape of the original signal has not changed, only there is vertical shift in the signal

Hence, answer is (C).

2. A positive logic NAND gate performs same as the negative logic:
1. XOR gate
2. OR gate
3. AND gate
4. NOR gate
The truth table of positive logic NOR gate is

0	0	1
1	0	0
0	1	0
1	1	0

Now invert all values (as if you place inverters on the two inputs and the one output) to find truth table of negative logic NOR gate:

1	1	0
0	1	1
1	0	1
0	0	1

Which is truth table of positive NAND gate

Hence, answer is (D)

3. If $C=0.1\mu F$, $R=3.25k\Omega$ in a phase shift oscillator feedback circuit, then the frequency of oscillation is:
1. 200 kHz
2. 100 Hz
3. 200 Hz
4. 100 kHz
Frequency of phase shift oscillator is $$f_r=\frac{1}{2\pi RC\sqrt{2N}}$$ where, $R$ is the Resistance in Ohms, $C$ is the Capacitance in Farads, and $N$ is the number of RC stages. In phase shift oscillator feed back circuit there are 3 RC stages. \begin{align*} f_r&={\textstyle \frac{1}{2\times3.14\times3.25\times10^{3}\times10^{-7} \times\sqrt{2\times 3}}}\\ &=200 Hz \end{align*}

Hence, answer is (C)

4. Load regulation is determined by :
1. Changes in load current and output voltage
2. Changes in load current and input voltage
3. Changes in load resistance and input voltage
4. Changes in Zener current and load current
Load regulation indicates the change in output voltage due to the change in load current. There is another type of voltage regulation, called line regulation and indicates the change in output voltage due to the change in input voltage.


Hence, answer is (A)

5. A carrier is simultaneously modulated by two sine waves with modulation indices of 0.3 and 0.4; then the total modulation index is :
1. 1
2. 0.1
3. 0.5
4. 0.35
$$m_1 = 0.3, m_2 = 0.4$$ $$m_t=\sqrt{m_1^2+m_2^2}=0.5$$

Hence, answer is (C)