Enhance a problem solving ability in Physics for various competitive and qualifying examinations like GRE, GATE, CSIR JRF-NET, SET, UPSC etc.
Notice
Friday, 16 December 2016
Problem set 41
In the op-amp circuit shown in the figure, $V_i$ is a sinusoidal input signal of frequency $10
Hz$ and $V_0$ is the output signal.
The magnitude of the gain and the phase shift, respectively, close to values
$5\sqrt{2}$ and $\pi/2$
$5\sqrt{2}$ and $-\pi/2$
10 and zero
10 and $\pi$
Here $R_1=1k=10^3\Omega$, $R_f=10k=10^4\Omega$, $C=0.01\mu F=0.01\times10^{-6}F=\times10^{-8}F$, $f=10Hz$.
At inverting terminal current is zero. Applying Kirchoff's current law at inverting terminal, we have
$$\frac{V_i}{R_1}+\frac{V_0}{R_f||Z_C}=0$$
$$\frac{V_0}{R_f||Z_C}=-\frac{V_i}{R_1}$$
\begin{align*}
\frac{V_0}{V_i}&=-\frac{R_f||Z_C}{R_1}\\
&=-\frac{R_fZ_C}{R_1(R_f+Z_C)}
\end{align*}
$$Z_C=\frac{X_C}{j}\quad\text{where }j=\sqrt{-1} $$
\begin{align*}
X_C&=\frac{1}{\omega C}=\frac{1}{2\pi f C}\\
&=\frac{1}{2\pi\times10\times 10^{-8}}=\frac{10^{7}}{2\pi}
\end{align*}
$$Z_C=\frac{10^{7}}{j2\pi}$$
\begin{align*}
\frac{V_0}{V_i}&=-\frac{10^4\times \frac{10^{7}}{j2\pi}}{10^3\left(10^4+\frac{10^{7}}{j2\pi}\right)}\\
&=-\frac{10^1}{\left(j2\pi10^{-4}+1\right)}\\
&=-\frac{10\left(1-j2\pi10^{-4}\right)}{\left(-4\pi^210^{-8}+1\right)}\\
\end{align*}
$$\left|\frac{V_0}{V_i}\right|\simeq10$$
For parallel RC-circuit phase shift is
\begin{align*}
\phi&=-\tan^{-1}{\left(\frac{R}{X_C}\right)}\\
&=-\tan^{-1}{\left(\frac{{2\pi}\times10^4}{10^{7}}\right)}\\
&\simeq-\tan^{-1}{\left(0\right)}=\pi
\end{align*}
Hence, answer is (D)
The logic circuit shown in the figure below
implements the Boolean expression
$y=\overline{A\cdot B}$
$y=\bar{A}\cdot \bar{B}$
$y=A\cdot B$
$y=A+ B$
Exor gate has the output high if the inputs are not alike otherwise the output is low. Hence, output of two Exor gates will be
$\bar{A}$ and $\bar{B}$. Hence, $y=\bar{A}+\bar{B}=\overline{A\cdot B}$ (DeMorgan’s Law)
Hence, answer is (A)
A time varying signal $V_{in}$ is fed to an op-amp circuit with output signal $V_0$ as shown in the figure below.
The circuit implements a
high pass filter with cutoff frequency 16Hz
high pass filter with cutoff frequency 100 Hz
low pass filter with cutoff frequency 16Hz
low pass filter with cutoff frequency 100 Hz
In the circuit lower op-amp is integrator and integrator is a low pass-filter. OR In the lower op-amp non-inverting terminal is grounded. Hence, inverting terminal is virtual ground. Hence, capacitor is grounded. Hence, the RC combination of (10k) and $1\mu F$ acts as a low pass filter. Its cutoff frequency is given by $f=\frac{1}{2\pi RC}$.
\begin{align*}
f&=\frac{1}{2\times3.14\times 10\times10^3\times1\times10^{-6}}\\
&=15.91=16 Hz
\end{align*}
Hence, answer is (C).
In the following circuit the current through the load resistance is:
10 mA
1 mA
5 mA
0.5 mA
Voltage across load resistance is equal to voltage across zener diode. Hence, $I=\frac{10}{2\times10^3}=5 mA$.
Hence, answer is (C)
In the following clipping circuit, the clipping level is:
+ 25 V
- 25 V
- 5 V
+ 5 V
Due to voltage divider arrangement, the voltage drop across lower $50\Omega$ resistance is $V_D=+5 V$. Hence, clipping level is $V_R+V_D=5+0.6=5.6 V$
Hence, answer is (D)
No comments :
Post a Comment